Georgia Tech’s Center for Co-design of Chip, Package System (C3PS) led by Profs. A. Raychowdhury and M. Swaminathan headed-up Georgia Tech’s winning proposal that resulted in a 5 year, $3.5M award that will fund up to 10 GRA positions.

The use of AI in EDA is a hot topic due to significant progress with applying machine learning to the issues of chip design.

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